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| loginid=zhaolifeng@vanzotec.com,time=2014-01-08 11:29:34,ip=101.230.8.135,doctitle=MT6333_pmic_data_sheet_v01.pdf,company=vanzo_wcx version: 0 . 1 release date: 201 3 / 10 / 3 1 ? 201 3 mediatek inc. this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. specifications are subject to change without notice. mt63 3 3 pmic data sheet mediatek confidential for zhaolifeng@ vanzotec.com use only
o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 633 3 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 2 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited . document revision history revision date author description 0.1 201 3 / 10 / 3 1 shangying initial version 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 3 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. table of contents document revision history ................................ ................................ ................................ .. 2 table of contents ................................ ................................ ................................ ................. 3 1 overview ................................ ................................ ................................ ..................... 5 1.1 features ................................ ................................ ................................ .............. 5 1.2 applications ................................ ................................ ................................ ......... 5 1.3 general descriptions ................................ ................................ ............................. 5 1.4 ordering information ................................ ................................ ............................. 6 1.5 top marking definition ................................ ................................ ........................... 6 1.6 pi n assignments and descriptions ................................ ................................ ........... 6 2 electrical characteristics ................................ ................................ ............................. 8 2.1 absolute maximum ratings over operating free - air temperature range ...................... 8 2.2 thermal characteristic ................................ ................................ ........................... 8 2.3 pi n voltage range ................................ ................................ ................................ 8 2.4 recommended operating range ................................ ................................ ............ 9 2.5 electrical characteristics ................................ ................................ ........................ 9 2.6 regulator output ................................ ................................ ................................ 10 2.7 flash ................................ ................................ ................................ ................ 10 3 functional descripti ons ................................ ................................ ............................. 11 3.1 general descriptions ................................ ................................ ........................... 11 3.2 pmic functional blocks ................................ ................................ ....................... 11 3.2.1 power - on/off sequence ................................ ................................ ........ 12 power on/off sequence ................................ ................................ ................................ . 12 3.2.2 buck converter ................................ ................................ ..................... 12 3.2.3 flash driver ................................ ................................ ......................... 13 3.3 register table and description ................................ ................................ ............. 14 4 application notes ................................ ................................ ................................ ...... 47 4.1 connection with main chip & main pmic ................................ ................................ 47 5 MT6333 packaging ................................ ................................ ................................ ..... 48 5.1 package dimensions ................................ ................................ ........................... 48 appendix ................................ ................................ ................................ ........................... 49 lists of figures figure 1 - 1. MT6333 wlcsp - 30l pin assignment ................................ ................................ ..... 6 figure 3 - 1. MT6333 block diagr am ................................ ................................ ......................... 11 figure 3 - 2. power - on/off control sequence is controlled by mt6322/23: through pin buck_en ....... 12 figure 4 - 1. MT6333 connection with main chip and main pmic ................................ ................... 47 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 4 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. lists of tables table 1 - 1. MT6333 pin descriptions ................................ ................................ ......................... 7 table 2 - 1. absolute maximu m ratings ................................ ................................ ....................... 8 table 2 - 2. operation condition ................................ ................................ ................................ 8 table 2 - 2. operation condition ................................ ................................ ................................ 9 table 2 - 3. general electrical specifications ................................ ................................ ................ 9 table 2 - 4. regulator specifications ................................ ................................ ......................... 10 table 3 - 1. buck converter brief specifications ................................ ................................ ........... 13 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 5 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. 1 overview 1.1 features ? thermal r egulation and thermal shut - down ? boost mode for flashlight, torch : 3 00ma (base on led rating) , flash : 1. 0 a ? three bucks for vcore (1.15v/ 2 a) , vmem (1.2 25 v/ 1.5 a) and vrf (1.8 25 v/450ma) ? buck_en & sleep_b balls communicate with main pmic ( mt6323/ mt632 2 ). ? i2c interface ? 2.1259x2.638 wlcsp, 30 - balls, 0.4 - pitch 1.2 applications for power management of smart phones and other po r table systems . 1.3 general descriptions mt633 3 i s a sub - power management system chip optimized for 2g/3g handsets and smart phones, especially based on th e mediatek mt6323 /mt6322 system solution. mt633 3 highly integrate s one boost converter for flashlight driver and 3 buck converters for system power optimiz ation . the boost mode can be used to supply flashlight from vled pin. MT6333 also integrate s three buck converters for vcore/vmem/vrf which is used for higher current demand. buck_en pin is provided for power - on sequence controlled by main pmic, and sleep_b pin is for sleep mode contr o l. mt633 3 is available in a wlcsp - 30l package. the operati ng temperature ranges from - 20 to +80c . 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt63 33 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 6 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. 1.4 ordering information o rder # m arking t em p . range p ackage MT6333p/a - 20~80 o c wlcsp - 30 l 1.5 top marking definition MT6333p/a yyww: date code $$$$$$$: random code 1.6 pin assignments and descriptions figure 1 - 1 . MT6333 wlcsp - 30 l pin assignment 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < mtk MT6333p yyww - a$$h $$$$$$ b a t s n s l x s d a l x i s e t b o o t d r v c d t v l e d s c l v m e m _ f b v c o r e _ f b b u c k _ e n c s c s v m e m _ l x v b a t v b a t i n t v c o r e _ l x p g n d _ c h r a g n d p g n d _ b u c k s l e e p _ b a b c d e f 1 2 3 4 5 c h r i n v r f _ l x v r f _ f b v b u s c h r _ g a t e g n d p g n d _ b u c k o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 7 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. table 1 - 1 . MT6333 pin descriptions ball symbol i/o description flashlight driver a2 drvcdt o internal regulated power. supplies internal pwm pre - driver and supplies 6323 /mt6322 s chr_ldo ball. connects a 1 00n f capacitor to gnd. a3 boot i connects a 10 0 nf capacitor to lx ball for pwm bootstrapping. a4 vled o supplies power to led. a5 chrin i boost output to flashlight driver , high - current path . connects a 4.7uf capacitor to gnd. b3 vbus i nc b4,b5 lx switching node. connects to inductor and connects a 10 0 nf capacitor to boot ball. c1 iset i used for flashlight driver current calibration, 1kohm to gnd. c2 batsns i battery voltage sense; connects to battery - side. c4 chr_gate o nc c5 pgnd_chr internal power gnd for flashlight driver . connect this ball to boost input cap then to gnd plane. d4,d5 cs i boost i nternal current sense. e2 int o interrupt output; issues abnormal information to main chip ; t hermal shutdown/ocp , etc. e4,e5 vbat i battery input buck b2 vmem_fb i vmem feedback pin e3 vmem_lx switching node; connects to inductor. d1 vcore_fb i vcore feedback pin f5 vcore_lx switching node; connects to inductor. d2 vrf_fb i vrf feedback pin f2 vrf_lx switching node; connects to inductor. f3,f4 pgnd_buck internal power gnd for buck. connect this ball to buck input cap then to gnd plane. e1 sleep_b i buck sleep mode control input. f1 buck_en i buck turn - on/off control input. i2c a1 scl i i2c interface serial clock b1 sda i i2c interface serial data 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 8 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. 2 electrical characteristics 2.1 absolute maximum ratings over operating free - air temperature range stresses beyond those listed under table 2 - 1 . absolute m aximum r atings may cause permanent damage to the device. these numbers are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of specifications is not implied. exposure to absolu te maximum rating conditions for extended periods may affect the device reliability. table 2 - 1 . absolute m aximum r atings parameter conditions min. typical max. unit free - air temperature range - 40 85 c storage temperature range - 65 150 c battery input voltage range 4. 5 v esd robustness hbm 2 , 000 v 2.2 thermal characteristic parameter conditions min. typical max. unit thermal resistance from junction to ambient in free air 76 [1] c/w note : the d evice is mounted on a 4 - metal - layer pcb and modeled per jedec51 - 9 condition. 2.3 pin voltage range table 2 - 2 . operation c ondition pin name conditions min. typical max. unit boot 0 17.2 v chrin 0 5 17.2 drvcdt 0 4 4.5 cs 0 4.5 batsns 0 4.5 buck_en 0 3.8 4.5 chr_gate 0 4.5 int 0 1.87 2 iset 0 4.5 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 9 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. pin name conditions min. typical max. unit lx - 1 7 scl 0 1.87 2 sda 0 1.87 2 sleep_b 0 1.87 2 vbat 0 4.5 vcore_fb 0 1.15 1.5 vcore_lx - 1 4.5 vled 0 5 vmem_fb 0 1.2 1.5 vmem_lx - 1 4.5 vrf_fb 0 1.825 2.225 vrf_lx - 1 4.5 vbus 0 5 17.2 2.4 recommended operating range table 2 - 3 . operation condition parameter conditions min. typical max. unit operating temperature range - 25 6 5 c 2.5 electrical characteristics vbat = 3 .4 ~ 4. 35 v, minimum loads applied on all outputs, unless other wise noted. typical values are at t a = 25c. table 2 - 4 . general e lectrical s pecifications parameter conditions min. typical max. unit operation g round c urrent standby low - p ower mode 64 a interrupt output h igh v io - 0. 4 v output l ow 0. 2 v thermal s hut - down pmic s hut - down t hreshold 150 degree 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 10 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. 2.6 regulator output table 2 - 5 . regulator s pecifications parameter conditions min. typical max. unit buck - v core output voltage 1. 1 5 v output current 20 00 ma load transient - 4 4 % load regulation - 1 1 % buck C v mem output voltage 1.2 v output current 15 00 ma load transient - 4 4 % buck C v rf output voltage 1.8 25 v output current 450 ma turn - on o vershoot 10 % 2.7 flash table 2 - 9. flash specifications parameter conditions min. typical max. unit maximum led current vled=4.2v vbat=3. 6 v, 3.8v, 4. 4 v 1. 0 a led current accuracy i led R 800ma vbat=3. 6 v, 3.8v, 4. 4 v - 10 10 % 2 00 Q i led Q 800ma vbat=3. 6 v, 3.8v, 4. 4 v - 20 20 % over - voltage protection (led open protection) 4.25 4.4 4.55 v led short protection 1.85 2 2.15 v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 11 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. 3 functional description s 3.1 general descriptions mt63 3 3 i s a n integrated pmic that contains flashlight driver and bucks . figure 3 - 1 . is the block diagram of the whole picture of mt63 3 3 pmic. figure 3 - 1 . mt6 3 3 3 block diagram 3.2 pmic functional blocks mt 63 3 3 features three bucks for baseband, m e mory and rf and t he f lashlight driver for flash led . m t63 3 3 includes the following analog function s for use o n smart phone platform s . ? buck : p rovide s regulate d lower output voltage level from li - ion battery ? controller : g enerate s power - on/off sequence for bucks in such way to be applicable with mt6323 /6322 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < b a t m t 6 3 3 3 c h r i n d r v 4 0 d r v c d t b a t s d a s c l b a t s n s b u c k _ e n v c o r e v m e m c h r _ c o r e ( w / b o o s t & f s m ) s l e e p _ b v r f 1 8 8 v h s n l d m o s 8 v l s n l d m o s l x c s b o o t c h r _ g a t e v b u s c p s t r u p & c h r _ p r e p e f u s e i 2 c f l a s h d i r v e r v l e d i n t s p m v c o r e _ l x v c o r e _ f b v m e m _ l x v m e m _ f b v r f 1 8 _ l x v r f 1 8 _ f b t h e r m a l s e n s o r c l o c k o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 12 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. ? f lash driver : s upport s led driver for applications such as flashlight, camara flash or video recording lightening (or torch mode) m ore detailed descriptions of each sub - block are explained in the following sections. 3.2.1 power - o n / o ff sequence power - on/off of the bucks in MT6333 are controlled by hw pin strapping and sw setting. the on/off sequence of vcore and vmem is controlled by pin buck _en as shown in figure 3 - 2. vrf18 is controlled by software directly through i 2 c. figure 3 - 2 also depicts the voltage of vcore wil be reduced in sleep mode. power on/off sequence figure 3 - 2 . power - on/off control sequence is controlled by mt632 2/2 3: through pin buck_en over - temperature p rotection if the die temperature of pmic exceeds 150c, MT6333 vc ore will be set to sleep mode voltage while vmem is kept the same . once the over - temperature state is resolved, every block will return to its normal mode operation . since vrf18 is controlled by software directly , it w ill not be affected by this thermal prote ction . 3.2.2 buck converter there are 3 buck converters in mt63 33 to efficiently generate regulated power for digital core, lpddr3 (and lpddr2) and rf circuit . f igure 3 - 3 is the block diagram . the buck converters operate with typically 2mhz (vrf18) and 3mhz (vcore, vmem) fixed frequency pulse width modulation (pwm) to heavy load currents. at light load currents, the converter automatically enters pulse frequency modulation (pfm) mode to save po wer and improve light load efficiency. it also has a force - pwm mode option to allow the converter to remain in the pwm mode regardless of the load current, so that the noise spectrum of the converter can be minimized for certain highly - noise - sensitive hand set applications. the buck converters also have an internal over - current protection (ocp) circuit to limit the maximum high - side power fet current in over - load conditions. it has an internal soft start circuit to control the ramp - up rate of the output volt age during start - up. 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < c o u n t t i m i n g u s i n g b g _ c k c o u n t t i m i n g u s i n g b g _ c k b u c k _ e n v c o r e v m e m s l e e p _ b 2 . 6 m s 3 6 m s ( 1 8 m s * 2 f r o m 6 3 2 2 / 6 3 2 3 ) < 4 0 0 u s 3 4 . 8 m s o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 13 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. table 3 - 1 . buck c onverter b rief s pecification s buck n ame vout (volt) imax (ma) application v core 0. 7 ~ 1. 4v ( 6. 25mv/step) 20 00 digital core vmem 1.2 25 v 15 00 lpddr2, lpddr3 v rf18 1.825v 450 rf chip 1. digital core power , vc ore vcore is a high - current buck converter to provide a highly - efficient power supply for the handset digital core. powering from a li - ion battery, vcore steps down the input voltage from 3.4 ~ 4. 4 v to the typical output voltage of 1.1 5 v with a maximum load current capability of 2 a. the output voltage can be adjusted between 0.7v and 1. 4 v. in order to optimize the overall system efficiency for digital core, vcore features a dynamic voltage frequency scaling (dvfs) f unction which allows it to dynamically adjust its output voltage between 0.85 v and 1. 15 v under different voltage supply demands from the digital core circuit. for more details, refer to the dynamic voltage frequency scaling (dvfs) section. 2. lpddr2 , lpddr 3 power, v mem v mem is a high - current buck converter to provide a highly - efficient power supply for the ddr memory . powering from a li - ion battery, v mem steps down the input voltage from 3.4 ~ 4. 4 v to the typical output voltage of 1.2 25 v with a maximum load current capability of 1.5 a. 3. rf power , v rf18 vrf18 is a buck converter to provide a highly - efficient power supply for the handset rf power. powering from a li - ion battery, vrf18 steps down the input voltage from 3.4 ~ 4. 4 v to the typi cal output voltage of 1.825v with a maximum load current capability of 0. 45 a. 3.2.3 flash driver mt63 33 ha s a boost converter with a white led flash driver which is capable of delivering up to 1. 0 a and used in camera flash applications. therefore , there are tw o modes in flash driver, flash mode and torch ( video ) mode. f igure 3 - 9 is the block diagram . the power supply of led flash driver is chrin pin and vled pin is attached led. r set = 1k is an external resistor, which sets up the led current in flash mode and torch mode. flash mode in flash mode, the led current source is activated by rg_flash_en . while the flash on - sequence is done , the led current will ramp up to the target current. the range of led current souce is from 50ma to 1 , 0 00ma with 13 option s. the flash currents are programmed by register setting s . 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 14 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. torch (video) mode in torch/ video mode,t he led current provides 6 option s from 50ma to 3 00ma , and the current level can be adjusted by register setting s . the led current source is activated by rg_torch_mode . t he lsb of current level is 50ma. led short protect MT6333 flash driver has a n led short protection. a comparator detect s the voltage of vled pin. when the pin vled is short to gnd, the current source will be turned off immediately. led open protect MT6333 flash driver also has a n led open protection. w hen the pin vled voltage rises to the ovp voltage, the led current source will immediately be shut down. by reboot the led current source can be resume d to its normal operation . figure 3 - 9 . flash driver block diagram 3.3 register table and description module name: swchr base address: (+0h) address name width register function 00 cid0 8 chip id status 0 25 sta_con12 8 sta control register 12 31 dig_con8 8 dig control register 8 32 dig_con9 8 dig control register 9 35 dig_con12 8 dig control register 12 37 dig_con14 8 dig control register 14 3c gpio_con0 8 gpio control register 0 3d gpio_con1 8 gpio control register 1 3e gpio_con2 8 gpio control register 2 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < v r e f r s e t i l e d c h r i n v l e d o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 15 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. address name width register function 44 int_con0 8 int control register 0 45 int_con0_set 8 int control register 0 set 46 int_con0_clr 8 int control register 0 clr 47 int_con1 8 int control register 1 48 int_con1_set 8 int control register 1 set 49 int_con1_clr 8 int control register 1 clr 4a int_con2 8 int control register 2 4b int_con2_set 8 int control register 2 set 4c int_con2_clr 8 int control register 2 clr 4d chrwdt_con0 8 chrwdt control register 0 4e chrwdt_status0 8 chrwdt status register 0 4f int_status0 8 int status register 0 50 int_status1 8 int status register 1 51 int_status2 8 int status register 2 68 vcore_con17 8 vcore control register 17 6b vcore_con20 8 vcore control register 20 6c vcore_con21 8 vcore control register 21 6d vcore_con22 8 vcore control register 22 6e vcore_con23 8 vcore control register 23 80 vmem_con9 8 vmem control register 9 81 vmem_con12 8 vmem control register 12 82 vmem_con13 8 vmem control register 13 83 vmem_con14 8 vmem control register 14 84 vmem_con15 8 vmem control register 15 9f vrf18_con21 8 vrf18 control register 21 a0 vrf18_con22 8 vrf18 control register 22 fd cid1 8 chip id status 1 00 cid0 chip id status 0 93 bit 7 6 5 4 3 2 1 0 mne cid0 type ro reset 1 0 0 1 0 0 1 1 bit(s) mnemonic nam e description 7:0 cid0 cid0 cid0 25 sta_con12 sta control register 12 00 bit 7 6 5 4 3 2 1 0 nam e rgs_vle d_open rgs_vle d_short 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 16 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. type ro ro reset 0 0 bit(s) mnemonic nam e description 6 rgs_vl e d_open rgs_vled_ope n led open flag 5 rgs_vl e d_short rgs_vled_sh ort led short flag 31 dig_con8 dig control register 8 00 bit 7 6 5 4 3 2 1 0 nam e rg_flas h_en type rw reset 0 bit(s) mnemonic nam e description 0 rg_flas h_en rg_flash_en turns on flash current 0: disable 1: enable 32 dig_con9 dig control register 9 00 bit 7 6 5 4 3 2 1 0 nam e rg_torc h_mode type rw reset 0 bit(s) mnemonic name description 4 rg_t orc h_m ode rg_torch_mo de en ables torch mode 0: disable 1: enable 35 dig_con12 dig control register 12 00 bit 7 6 5 4 3 2 1 0 nam e rg_flash_iset type rw reset 0 0 0 0 bit(s) mnemonic nam e description 3:0 rg_flas h_iset rg_flash_ise t iset current setting 0000: 50ma (default) 0001: 100ma 0010: 150ma 0011: 200ma 0100: 250ma 0101: 300ma 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 17 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 0110: 400ma 0111: 500ma 1000: 600ma 1001: 700ma 1010: 800ma 1011: 900ma 1100: 1000ma 1101: 1100ma 1110: 1200ma 1111: 1300ma 37 dig_con14 dig control register 14 00 bit 7 6 5 4 3 2 1 0 nam e rg_flash_en_timeo ut_sel type rw reset 0 0 bit(s) mnemonic nam e description 7:6 rg_flas h_en_tim eout _se l rg_flash_en_ timeout_sel flash current turn - on time - out protection 00: 200ms 01: 400ms 10: 600ms 11: 800ms 3c gpio_con0 gpio control register 0 02 bit 7 6 5 4 3 2 1 0 nam e i2c_deg_ en i2c_conf ig type rw rw reset 1 0 bit(s) mnemonic nam e description 1 i2c_deg_ en i2c_deg_en en ables deglitch 0: disable 1: enable 0 i2c_conf ig i2c_config configures i2c sda io 0: open - drain mode 1: tri - state mode 3d gpio_con1 gpio control register 1 11 bit 7 6 5 4 3 2 1 0 nam e scl_out scl_oe scl_mode sda_out sda_oe sda_mode type rw rw rw rw rw rw reset 0 0 0 1 0 0 0 1 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 18 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 7 scl_out scl_out sdl_out gpio m ode 6 scl_oe scl_oe sdl_oe gpio m ode 5:4 scl_mod e scl_mode 00: gpio_mode 01: i2c 10: reserved 11: reserved 3 sda_out sda_out sda_out gpio m ode 2 sda_oe sda_oe sda_oe gpio m ode 1:0 sda_mo de sda_mode 00: gpio_mode 01: i2c 10: reserved 11: reserved 3e gpio_con2 gpio control register 2 09 bit 7 6 5 4 3 2 1 0 nam e int_out int_oe int_mode type rw rw rw reset 1 0 0 1 bit(s) mnemonic nam e description 3 int_out int_out int_out gpio m ode 2 int_oe int_oe int_oe gpio m ode 1:0 int_m od e int_mode 00: gpio_mode 01: eint 10: debug monitor 11: reserved 44 int_con0 int control register 0 ff bit 7 6 5 4 3 2 1 0 nam e rg_int_e n_therm al_reg_ out rg_int_e n_therm al_reg_i n rg_int_e n_therm al_sd type rw rw rw reset 1 1 1 bit(s) mnemonic nam e description 3 rg_int _e n_t herm al_reg_ out rg_int_en_th ermal_reg_o ut en ables interrupt of thermal_reg_out 0: does not issue interrupt 1: issue interrupt 2 rg_int _e n_t herm al_reg_i n rg_int_en_th ermal_reg_in en ables interrupt of thermal_reg_in 0: does not issue interrupt 1: issue interrupt 1 rg_int _e n_t herm al_sd rg_int_en_th ermal_sd en ables interrupt of thermal_sd 0: does not issue interrupt 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 19 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1: issue interrupt 45 int_con0_set int control register 0 set ff bit 7 6 5 4 3 2 1 0 nam e rg_int_e n_therm al_reg_ out_set rg_int_e n_therm al_reg_i n_set rg_int_e n_therm al_sd_s et type w1 w1 w1 reset 1 1 1 bit(s) mnemonic nam e description 3 rg_int _e n_t herm al_reg_ out_set rg_int_en_th ermal_reg_o ut_set 1'b0: does not set 1'b1: set 2 rg_int _e n_t herm al_reg_i n_set rg_int_en_th ermal_reg_in _set 1'b0: does not set 1'b1: set 1 rg_int _e n_t herm al_sd_s et rg_int_en_th ermal_sd_set 1'b0: does not set 1'b1: set 46 int_con0_clr int control register 0 clr ff bit 7 6 5 4 3 2 1 0 nam e rg_int_e n_therm al_reg_ out_clr rg_int_e n_therm al_reg_i n_clr rg_int_e n_therm al_sd_c lr type w1 w1 w1 reset 1 1 1 bit(s) mnemonic nam e description 3 rg_int _e n_t herm al_reg_ out_cl r rg_int_en_th ermal_reg_o ut_clr 1'b0: does not clear 1'b1: clear 2 rg_int _e n_t herm al_reg_i n_cl r rg_int_en_th ermal_reg_in _clr 1'b0: does not clear 1'b1: clear 1 rg_int _e n_t herm al_sd_c lr rg_int_en_th ermal_sd_clr 1'b0: does not clear 1'b1: clear 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 20 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. 47 int_con1 int control register 1 ff bit 7 6 5 4 3 2 1 0 nam e rg_int_e n_flash _vled_o pen rg_int_e n_flash _vled_s hort rg_int_e n_flash _en_time out rg_int_e n_buck_ thermal rg_int_e n_buck_ vrf18_o c rg_int_e n_buck_ vmem_o c rg_int_e n_buck_ vcore_o c rg_int_e n_chrw dt_flag type rw rw rw rw rw rw rw rw reset 1 1 1 1 1 1 1 1 bit(s) mnemonic nam e description 7 rg_int _e n_flash _vled_o pen rg_int_en_fla sh_vled_open en ables interrupt of flash open 0: does not issue interrupt 1: issue interrupt 6 rg_int _e n_flash _vled_s hort rg_int_en_fla sh_vled_shor t en ables interrupt of flash short 0: does not issue interrupt 1: issue interrupt 5 rg_int _e n_flash _en_tim e out rg_int_en_fla sh_en_timeou t en ables interrupt of flash timeout 0: does not issue interrupt 1: issue interrupt 4 rg_int _e n_buck_ thermal rg_int_en_bu ck_therma l en ables interrupt of buck_t hermal 0: does not issue interrupt 1: issue interrupt 3 rg_int _e n_buck_ vrf18_o c rg_int_en_bu ck_v rf18_oc en ables interrupt of vrf18 oc 0: does not issue interrupt 1: issue interrupt 2 rg_int _e n_buck_ vmem_o c rg_int_en_bu ck_v mem_oc en ables interrupt of vmem oc 0: does not issue interrupt 1: issue interrupt 1 rg_int _e n_buck_ vcore_o c rg_int_en_bu ck_v core_oc en ables interrupt of vcore oc 0: does not issue interrupt 1: issue interrupt 0 rg_int _e n_chrw dt_flag rg_int_en_ch rwdt_flag en ables interrupt of chrwdt_flag 0: does not issue interrupt 1: issue interrupt 48 int_con1_set int control register 1 set ff bit 7 6 5 4 3 2 1 0 nam e rg_int_e n_flash _vled_o pen_set rg_int_e n_flash _vled_s hort_se t rg_int_e n_flash _en_time out_set rg_int_e n_buck_ thermal _set rg_int_e n_buck_ vrf18_o c_set rg_int_e n_buck_ vmem_oc _set rg_int_e n_buck_ vcore_o c_set rg_int_e n_chrw dt_flag _set type w1 w1 w1 w1 w1 w1 w1 w1 reset 1 1 1 1 1 1 1 1 bit(s) mnemonic nam e description 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 21 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 7 rg_int _e n_flash _vled_o pen_set rg_int_en_fla sh_vled_open _set 1'b0: does not set 1'b1: set 6 rg_int _e n_flash _vled_s hort_se t rg_int_en_fla sh_vled_shor t_set 1'b0: does not set 1'b1: set 5 rg_int _e n_flash _en_tim e out_set rg_int_en_fla sh_en_timeou t_set 1'b0: does not set 1'b1: set 4 rg_int _e n_buck_ thermal _set rg_int_en_bu ck_therma l_s et 1'b0: does not set 1'b1: set 3 rg_int _e n_buck_ vrf18_o c_set rg_int_en_bu ck_v rf18_oc_ set 1'b0: does not set 1'b1: set 2 rg_int _e n_buck_ vmem_o c_set rg_int_en_bu ck_v mem_oc_ set 1'b0: does not set 1'b1: set 1 rg_int _e n_buck_ vcore_o c_set rg_int_en_bu ck_v core_oc _set 1'b0: does not set 1'b1: set 0 rg_int _e n_chrw dt_flag _set rg_int_en_ch rwdt_flag_se t 1'b0: does not set 1'b1: set 49 int_con1_clr int control register 1 clr ff bit 7 6 5 4 3 2 1 0 nam e rg_int_e n_flash _vled_o pen_clr rg_int_e n_flash _vled_s hort_cl r rg_int_e n_flash _en_time out_clr rg_int_e n_buck_ thermal _clr rg_int_e n_buck_ vrf18_o c_clr rg_int_e n_buck_ vmem_o c_clr rg_int_e n_buck_ vcore_o c_clr rg_int_e n_chrw dt_flag _clr type w1 w1 w1 w1 w1 w1 w1 w1 reset 1 1 1 1 1 1 1 1 bit(s) mnemonic nam e description 7 rg_int _e n_flash _vled_o pen_cl r rg_int_en_fla sh_vled_open _clr 1'b0: does not clear 1'b1: clear 6 rg_int _e n_flash _vled_s hort_cl rg_int_en_fla sh_vled_shor t_clr 1'b0: does not clear 1'b1: clear 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 22 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description r 5 rg_int _e n_flash _en_tim e out_cl r rg_int_en_fla sh_en_timeou t_clr 1'b0: does not clear 1'b1: clear 4 rg_int _e n_buck_ thermal _clr rg_int_en_bu ck_therma l_c lr 1'b0: does not clear 1'b1: clear 3 rg_int _e n_buck_ vrf18_o c_cl r rg_int_en_bu ck_v rf18_oc_ clr 1'b0: does not clear 1'b1: clear 2 rg_int _e n_buck_ vmem_o c_cl r rg_int_en_bu ck_v mem_oc_ clr 1'b0: does not clear 1'b1: clear 1 rg_int _e n_buck_ vcore_o c_cl r rg_int_en_bu ck_v core_oc _clr 1'b0: does not clear 1'b1: clear 0 rg_int _e n_chrw dt_flag _clr rg_int_en_ch rwdt_flag_cl r 1'b0: does not clear 1'b1: clear 4a int_con2 int control register 2 03 bit 7 6 5 4 3 2 1 0 nam e rg_int_e n_chr_p lug_in_f lash type rw reset 1 bit(s) mnemonic nam e description 1 rg_int _e n_chr_p lug_in_f lash rg_int_en_ch r_plug_in_fla sh 0: does not issue interrupt 1: issue interrupt 4b int_con2_set int control register 2 set 03 bit 7 6 5 4 3 2 1 0 nam e rg_int_e n_chr_p lug_in_f lash_se t type w1 reset 1 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 23 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1 rg_int _e n_chr_p lug_in_f lash_se t rg_int_en_ch r_plug_in_fla sh_set 1'b0: does not set 1'b1: set 4c int_con2_clr int control register 2 clr 03 bit 7 6 5 4 3 2 1 0 nam e rg_int_e n_chr_p lug_in_f lash_cl r type w1 reset 1 bit(s) mnemonic nam e description 1 rg_int _e n_chr_p lug_in_f lash_cl r rg_int_en_ch r_plug_in_fla sh_clr 1'b0: does not clear 1'b1: clear 4d chrwdt_con0 chrwdt control register 0 0d bit 7 6 5 4 3 2 1 0 nam e rg_chr wdt_wr rg_chrwdt_td rg_chr wdt_en type rw rw rw reset 0 1 1 0 1 bit(s) mnemonic nam e description 7 rg_chr wdt_wr rg_chrwdt_w r clears tim er flag 3:1 rg_chr wdt_t d rg_chrwdt_t d time - out interval of w atchdog timer 000: 4 sec 001: 32 sec 010: 60 sec 011: 256 sec 100: 480 sec 101: 1,024 sec 110: 1,800 sec 111: 3,000 sec 0 rg_chr wdt_en rg_chrwdt_e n en ables w atchdog timer 4e chrwdt_status0 chrwdt status register 0 00 bit 7 6 5 4 3 2 1 0 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 24 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. nam e rg_chr wdt_fla g type ro reset 0 bit(s) mnemonic nam e description 0 rg_chr wdt_fla g rg_chrwdt_f lag w atchdog timer flag 4f int_status0 int status register 0 00 bit 7 6 5 4 3 2 1 0 nam e rg_int_s tatus_o tg_drvc dt_shor t rg_int_s tatus_o tg_chri n_short rg_int_s tatus_o tg_ ther mal rg_int_s tatus_o tg_oc rg_int_s tatus_ t hermal_ reg_out rg_int_s tatus_ t hermal_ reg_in rg_int_s tatus_ t hermal_ sd type ro ro ro ro ro ro ro reset 0 0 0 0 0 0 0 bit(s) mnemonic name description 7 rg_int _s tatus_o tg_drvc dt_shor t rg_int_status _otg_drv cdt_ short 0: no interrupt issued 1: interrupt issued 6 rg_int _s tatus_o tg_chri n_short rg_int_status _otg_chrin_s hort 0: no interrupt issued 1: interrupt issued 5 rg_int _s tatus_o tg_t her mal rg_int_status _otg_therma l 0: no interrupt issued 1: interrupt issued 4 rg_int _s tatus_o tg_oc rg_int_status _otg_oc 0: no interrupt issued 1: interrupt issued 3 rg_int _s tatus_t hermal_ reg_out rg_int_status _thermal_re g_out 0: no interrupt issued 1: interrupt issued 2 rg_int _s tatus_t hermal_ reg_in rg_int_status _thermal_re g_in 0: no interrupt issued 1: interrupt issued 1 rg_int _s tatus_t hermal_ sd rg_int_status _thermal_sd 0: no interrupt issued 1: interrupt issued 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 25 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. 50 int_status1 int status register 1 00 bit 7 6 5 4 3 2 1 0 nam e rg_int_s tatus_fl ash_vle d_open rg_int_s tatus_fl ash_vle d_short rg_int_s tatus_fl ash_en_ timeout rg_int_s tatus_b uck_the rmal rg_int_s tatus_b uck_vrf 18_oc rg_int_s tatus_b uck_vme m_oc rg_int_s tatus_b uck_vco re_oc rg_int_s tatus_c hrwdt_f lag type ro ro ro ro ro ro ro ro reset 0 0 0 0 0 0 0 0 bit(s) mnemonic nam e description 7 rg_int _s tatus_f lash_vl ed_open rg_int_status _flash_vled_ open 0: no interrupt issued 1: interrupt issued 6 rg_int _s tatus_f lash_vl ed_shor t rg_int_status _flash_vled_ short 0: no interrupt issued 1: interrupt issued 5 rg_int _s tatus_f lash_en _timeou t rg_int_status _flash_en_tim eout 0: no interrupt issued 1: interrupt issued 4 rg_int _s tatus_b uck_t he rmal rg_int_status _buck_therm al 0: no interrupt issued 1: interrupt issued 3 rg_int _s tatus_b uck_vrf 18_oc rg_int_status _buck_vrf18_ oc 0: no interrupt issued 1: interrupt issued 2 rg_int _s tatus_b uck_vme m_oc rg_int_status _buck_v mem_ oc 0: no interrupt issued 1: interrupt issued 1 rg_int _s tatus_b uck_vco re_oc rg_int_status _buck_vcore_ oc 0: no interrupt issued 1: interrupt issued 0 rg_int _s tatus_c hrwdt_f lag rg_int_status _chrwdt_fla g 0: no interrupt issued 1: interrupt issued 51 int_status2 int status register 2 00 bit 7 6 5 4 3 2 1 0 nam e rg_int_s tatus_c hr_plug _in_flas h type ro reset 0 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 26 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1 rg_int _s tatus_c hr_pl ug _in_flas h rg_int_status _chr_plug_in _flash 0: no interrupt issued 1: interrupt issued 68 vcore_con17 vcore control register 17 20 bit 7 6 5 4 3 2 1 0 nam e vcore_e n_ctrl qi_vcor e_en qi_vcor e_stb vcore_e n type rw ro ro rw reset 0 0 0 0 bit(s) mnemonic nam e description 4 vcore_e n_ct rl vcore_en_ct rl en ables control 0: sw control 1: hw control 3 qi_vcor e_en qi_v core_en en abling signal 2 qi_vcor e_st b qi_v core_stb soft start 1 vcore_e n vcore_en 0: enable vcore 1: disable v core 6b vcore_con20 vcore control register 20 48 bit 7 6 5 4 3 2 1 0 nam e vcore_vosel type rw reset 1 0 0 1 0 0 0 bit(s) mnemonic nam e description 6:0 vcore_v osel vcore_v osel selects vout in register m ode 0000000: 0.70000v 0000001: 0.70625v 0000010: 0.71250v 0000011: 0.71875v 0000100: 0.72500v 0000101: 0.73125v 0000110: 0.73750v 0000111: 0.74375v 0001000: 0.75000v 0001001: 0.75625v 0001010: 0.76250v 0001011: 0.76875v 0001100: 0.77500v 0001101: 0.78125v 0001110: 0.78750v 0001111: 0.79375v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 27 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 0010000: 0.80000v 0010001: 0.80625v 0010010: 0.81250v 0010011: 0.81875v 0010100: 0.82 500v 0010101: 0.83125v 0010110: 0.83750v 0010111: 0.84375v 0011000: 0.85000v 0011001: 0.85625v 0011010: 0.86250v 0011011: 0.86875v 0011100: 0.87500v 0011101: 0.88125v 0011110: 0.88750v 0011111: 0.89375v 0100000: 0.90000v 0100001: 0.90625v 0100010: 0.91250v 0100011: 0.91875v 0100100: 0.92500v 0100101: 0.93125v 0100110: 0.93750v 0100111: 0.94375v 0101000: 0.95000v 0101001: 0.95625v 0101010: 0.96250v 0101011: 0.96875v 0101100: 0.97500v 0101101: 0.98125v 0101110: 0.98750v 0101111: 0.99375v 0110000: 1.00000v 011 0001: 1.00625v 0110010: 1.01250v 0110011: 1.01875v 0110100: 1.02500v 0110101: 1.03125v 0110110: 1.03750v 0110111: 1.04375v 0111000: 1.05000v 0111001: 1.05625v 0111010: 1.06250v 0111011: 1.06875v 0111100: 1.07500v 0111101: 1.08125v 0111110: 1.08750v 0111111 : 1.09375v 1000000: 1.10000v 1000001: 1.10625v 1000010: 1.11250v 1000011: 1.11875v 1000100: 1.12500v 1000101: 1.13125v 1000110: 1.13750v 1000111: 1.14375v 1001000: 1.15000v 1001001: 1.15625v 1001010: 1.16250v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 28 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1001011: 1.16875v 1001100: 1.17500v 1001101: 1. 18125v 1001110: 1.18750v 1001111: 1.19375v 1010000: 1.20000v 1010001: 1.20625v 1010010: 1.21250v 1010011: 1.21875v 1010100: 1.22500v 1010101: 1.23125v 1010110: 1.23750v 1010111: 1.24375v 1011000: 1.25000v 1011001: 1.25625v 1011010: 1.26250v 1011011: 1.2687 5v 1011100: 1.27500v 1011101: 1.28125v 1011110: 1.28750v 1011111: 1.29375v 1100000: 1.30000v 1100001: 1.30625v 1100010: 1.31250v 1100011: 1.31875v 1100100: 1.32500v 1100101: 1.33125v 1100110: 1.33750v 1100111: 1.34375v 1101000: 1.35000v 1101001: 1.35625v 1 101010: 1.36250v 1101011: 1.36875v 1101100: 1.37500v 1101101: 1.38125v 1101110: 1.38750v 1101111: 1.39375v 1110000: 1.40000v 1110001: 1.40625v 1110010: 1.41250v 1110011: 1.41875v 1110100: 1.42500v 1110101: 1.43125v 1110110: 1.43750v 1110111: 1.44375v 11110 00: 1.45000v 1111001: 1.45625v 1111010: 1.46250v 1111011: 1.46875v 1111100: 1.47500v 1111101: 1.48125v 1111110: 1.48750v 1111111: 1.49375v 6c vcore_con21 vcore control register 21 48 bit 7 6 5 4 3 2 1 0 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 29 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. nam e vcore_vosel_on type rw reset 1 0 0 1 0 0 0 bit(s) mnemonic nam e description 6:0 vcore_v osel_on vcore_v osel_ on selects vout in norm al m ode 0000000: 0.70000v 0000001: 0.70625v 0000010: 0.71250v 0000011: 0.71875v 0000100: 0.72500v 0000101: 0.73125v 0000110: 0.73750v 0000111: 0.74375v 0001000: 0.75000v 0001001: 0.75625v 0001010: 0.76250v 0001011: 0.76875v 0001100: 0. 77500v 0001101: 0.78125v 0001110: 0.78750v 0001111: 0.79375v 0010000: 0.80000v 0010001: 0.80625v 0010010: 0.81250v 0010011: 0.81875v 0010100: 0.82500v 0010101: 0.83125v 0010110: 0.83750v 0010111: 0.84375v 0011000: 0.85000v 0011001: 0.85625v 0011010: 0.8625 0v 0011011: 0.86875v 0011100: 0.87500v 0011101: 0.88125v 0011110: 0.88750v 0011111: 0.89375v 0100000: 0.90000v 0100001: 0.90625v 0100010: 0.91250v 0100011: 0.91875v 0100100: 0.92500v 0100101: 0.93125v 0100110: 0.93750v 0100111: 0.94375v 0101000: 0.95000v 0 101001: 0.95625v 0101010: 0.96250v 0101011: 0.96875v 0101100: 0.97500v 0101101: 0.98125v 0101110: 0.98750v 0101111: 0.99375v 0110000: 1.00000v 0110001: 1.00625v 0110010: 1.01250v 0110011: 1.01875v 0110100: 1.02500v 0110101: 1.03125v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 30 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 0110110: 1.03750v 01101 11: 1.04375v 0111000: 1.05000v 0111001: 1.05625v 0111010: 1.06250v 0111011: 1.06875v 0111100: 1.07500v 0111101: 1.08125v 0111110: 1.08750v 0111111: 1.09375v 1000000: 1.10000v 1000001: 1.10625v 1000010: 1.11250v 1000011: 1.11875v 1000100: 1.12500v 1000101: 1.13125v 1000110: 1.13750v 1000111: 1.14375v 1001000: 1.15000v 1001001: 1.15625v 1001010: 1.16250v 1001011: 1.16875v 1001100: 1.17500v 1001101: 1.18125v 1001110: 1.18750v 1001111: 1.19375v 1010000: 1.20000v 1010001: 1.20625v 1010010: 1.21250v 1010011: 1.21 875v 1010100: 1.22500v 1010101: 1.23125v 1010110: 1.23750v 1010111: 1.24375v 1011000: 1.25000v 1011001: 1.25625v 1011010: 1.26250v 1011011: 1.26875v 1011100: 1.27500v 1011101: 1.28125v 1011110: 1.28750v 1011111: 1.29375v 1100000: 1.30000v 1100001: 1.30625v 1100010: 1.31250v 1100011: 1.31875v 1100100: 1.32500v 1100101: 1.33125v 1100110: 1.33750v 1100111: 1.34375v 1101000: 1.35000v 1101001: 1.35625v 1101010: 1.36250v 1101011: 1.36875v 1101100: 1.37500v 1101101: 1.38125v 1101110: 1.38750v 1101111: 1.39375v 111 0000: 1.40000v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 31 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1110001: 1.40625v 1110010: 1.41250v 1110011: 1.41875v 1110100: 1.42500v 1110101: 1.43125v 1110110: 1.43750v 1110111: 1.44375v 1111000: 1.45000v 1111001: 1.45625v 1111010: 1.46250v 1111011: 1.46875v 1111100: 1.47500v 1111101: 1.48125v 1111110 : 1.48750v 1111111: 1.49375v 6d vcore_con22 vcore control register 22 18 bit 7 6 5 4 3 2 1 0 nam e vcore_vosel_sleep type rw reset 0 0 1 1 0 0 0 bit(s) mnemonic nam e description 6:0 vcore_v osel_sl eep vcore_v osel_ sleep selects vout in sleep m ode 0000000: 0.70000v 0000001: 0.70625v 0000010: 0.71250v 0000011: 0.71875v 0000100: 0.72500v 0000101: 0.73125v 0000110: 0.73750v 0000111: 0.74375v 0001000: 0.75000v 0001001: 0.75625v 0001010: 0.76250v 0001011: 0.76875v 0001100: 0.77500v 0001101: 0.78125v 0001110: 0.78750v 0001111: 0.79375v 0010000: 0.80000v 0010001: 0.80625v 0010 010: 0.81250v 0010011: 0.81875v 0010100: 0.82500v 0010101: 0.83125v 0010110: 0.83750v 0010111: 0.84375v 0011000: 0.85000v 0011001: 0.85625v 0011010: 0.86250v 0011011: 0.86875v 0011100: 0.87500v 0011101: 0.88125v 0011110: 0.88750v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 32 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 0011111: 0.89375v 0100000: 0.90000v 0100001: 0.90625v 0100010: 0.91250v 0100011: 0.91875v 0100100: 0.92500v 0100101: 0.93125v 0100110: 0.93750v 0100111: 0.94375v 0101000: 0.95000v 0101001: 0.95625v 0101010: 0.96250v 0101011: 0.96875v 0101100: 0.97500v 0101101: 0.98125v 0101110: 0.9 8750v 0101111: 0.99375v 0110000: 1.00000v 0110001: 1.00625v 0110010: 1.01250v 0110011: 1.01875v 0110100: 1.02500v 0110101: 1.03125v 0110110: 1.03750v 0110111: 1.04375v 0111000: 1.05000v 0111001: 1.05625v 0111010: 1.06250v 0111011: 1.06875v 0111100: 1.07500 v 0111101: 1.08125v 0111110: 1.08750v 0111111: 1.09375v 1000000: 1.10000v 1000001: 1.10625v 1000010: 1.11250v 1000011: 1.11875v 1000100: 1.12500v 1000101: 1.13125v 1000110: 1.13750v 1000111: 1.14375v 1001000: 1.15000v 1001001: 1.15625v 1001010: 1.16250v 10 01011: 1.16875v 1001100: 1.17500v 1001101: 1.18125v 1001110: 1.18750v 1001111: 1.19375v 1010000: 1.20000v 1010001: 1.20625v 1010010: 1.21250v 1010011: 1.21875v 1010100: 1.22500v 1010101: 1.23125v 1010110: 1.23750v 1010111: 1.24375v 1011000: 1.25000v 101100 1: 1.25625v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 33 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1011010: 1.26250v 1011011: 1.26875v 1011100: 1.27500v 1011101: 1.28125v 1011110: 1.28750v 1011111: 1.29375v 1100000: 1.30000v 1100001: 1.30625v 1100010: 1.31250v 1100011: 1.31875v 1100100: 1.32500v 1100101: 1.33125v 1100110: 1.33750v 1100111: 1 .34375v 1101000: 1.35000v 1101001: 1.35625v 1101010: 1.36250v 1101011: 1.36875v 1101100: 1.37500v 1101101: 1.38125v 1101110: 1.38750v 1101111: 1.39375v 1110000: 1.40000v 1110001: 1.40625v 1110010: 1.41250v 1110011: 1.41875v 1110100: 1.42500v 1110101: 1.431 25v 1110110: 1.43750v 1110111: 1.44375v 1111000: 1.45000v 1111001: 1.45625v 1111010: 1.46250v 1111011: 1.46875v 1111100: 1.47500v 1111101: 1.48125v 1111110: 1.48750v 1111111: 1.49375v 6e vcore_con23 vcore control register 23 48 bit 7 6 5 4 3 2 1 0 nam e ni_vcore_vosel type ro reset 1 0 0 1 0 0 0 bit(s) mnemonic nam e description 6:0 ni_vcor e_vosel ni_vcore_vos el selects vout 0000000: 0.70000v 0000001: 0.70625v 0000010: 0.71250v 0000011: 0.71875v 0000100: 0.72500v 0000101: 0.73125v 0000110: 0.73750v 0000111: 0.74375v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 34 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 0001000: 0.75000v 0001001: 0.75625v 0001010: 0.76250v 0001011: 0.76875v 0001100: 0.77500v 0001101: 0.78125v 0001110: 0.78750v 0001111: 0.79375v 0010000: 0.80000v 0010001: 0.80625v 0010010: 0.81250v 0010011: 0.81875v 0010100: 0.82500v 0010101: 0.83125v 0010110: 0.83750v 0010111: 0.84375v 0011000: 0.85 000v 0011001: 0.85625v 0011010: 0.86250v 0011011: 0.86875v 0011100: 0.87500v 0011101: 0.88125v 0011110: 0.88750v 0011111: 0.89375v 0100000: 0.90000v 0100001: 0.90625v 0100010: 0.91250v 0100011: 0.91875v 0100100: 0.92500v 0100101: 0.93125v 0100110: 0.93750v 0100111: 0.94375v 0101000: 0.95000v 0101001: 0.95625v 0101010: 0.96250v 0101011: 0.96875v 0101100: 0.97500v 0101101: 0.98125v 0101110: 0.98750v 0101111: 0.99375v 0110000: 1.00000v 0110001: 1.00625v 0110010: 1.01250v 0110011: 1.01875v 0110100: 1.02500v 011 0101: 1.03125v 0110110: 1.03750v 0110111: 1.04375v 0111000: 1.05000v 0111001: 1.05625v 0111010: 1.06250v 0111011: 1.06875v 0111100: 1.07500v 0111101: 1.08125v 0111110: 1.08750v 0111111: 1.09375v 1000000: 1.10000v 1000001: 1.10625v 1000010: 1.11250v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 35 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1000011 : 1.11875v 1000100: 1.12500v 1000101: 1.13125v 1000110: 1.13750v 1000111: 1.14375v 1001000: 1.15000v 1001001: 1.15625v 1001010: 1.16250v 1001011: 1.16875v 1001100: 1.17500v 1001101: 1.18125v 1001110: 1.18750v 1001111: 1.19375v 1010000: 1.20000v 1010001: 1. 20625v 1010010: 1.21250v 1010011: 1.21875v 1010100: 1.22500v 1010101: 1.23125v 1010110: 1.23750v 1010111: 1.24375v 1011000: 1.25000v 1011001: 1.25625v 1011010: 1.26250v 1011011: 1.26875v 1011100: 1.27500v 1011101: 1.28125v 1011110: 1.28750v 1011111: 1.2937 5v 1100000: 1.30000v 1100001: 1.30625v 1100010: 1.31250v 1100011: 1.31875v 1100100: 1.32500v 1100101: 1.33125v 1100110: 1.33750v 1100111: 1.34375v 1101000: 1.35000v 1101001: 1.35625v 1101010: 1.36250v 1101011: 1.36875v 1101100: 1.37500v 1101101: 1.38125v 1 101110: 1.38750v 1101111: 1.39375v 1110000: 1.40000v 1110001: 1.40625v 1110010: 1.41250v 1110011: 1.41875v 1110100: 1.42500v 1110101: 1.43125v 1110110: 1.43750v 1110111: 1.44375v 1111000: 1.45000v 1111001: 1.45625v 1111010: 1.46250v 1111011: 1.46875v 11111 00: 1.47500v 1111101: 1.48125v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 36 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1111110: 1.48750v 1111111: 1.49375v 80 vmem_c on9 vmem control register 9 00 bit 7 6 5 4 3 2 1 0 nam e qi_vmem _en qi_vmem _stb vmem_en type ro ro rw reset 0 0 0 bit(s) mnemonic nam e description 3 qi_vm em _en qi_v mem_en en abling signal 2 qi_vm em _st b qi_v mem_stb soft start 1 vmem_en vmem_en 0: enable v mem 1: disable v mem 81 vmem_con12 vmem control register 12 50 bit 7 6 5 4 3 2 1 0 nam e vmem_vosel type rw reset 1 0 1 0 0 0 0 bit(s) mnemonic nam e description 6:0 vmem_v osel vmem_vosel selects vout in register m ode 0000000: 0.70000v 0000001: 0.70625v 0000010: 0.71250v 0000011: 0.71875v 0000100: 0.72500v 0000101: 0.73125v 0000110: 0.73750v 0000111: 0.74375v 0001000: 0.75000v 0001001: 0.75625v 0001010: 0.76250v 0001011: 0.76875v 0001100: 0.77500v 0001101: 0.78125v 0001110: 0.78750v 0001111: 0.79375v 0010000: 0.80000v 0010001: 0.80 625v 0010010: 0.81250v 0010011: 0.81875v 0010100: 0.82500v 0010101: 0.83125v 0010110: 0.83750v 0010111: 0.84375v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 37 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 0011000: 0.85000v 0011001: 0.85625v 0011010: 0.86250v 0011011: 0.86875v 0011100: 0.87500v 0011101: 0.88125v 0011110: 0.88750v 0011111: 0.89375v 0100000: 0.90000v 0100001: 0.90625v 0100010: 0.91250v 0100011: 0.91875v 0100100: 0.92500v 0100101: 0.93125v 0100110: 0.93750v 0100111: 0.94375v 0101000: 0.95000v 0101001: 0.95625v 0101010: 0.96250v 0101011: 0.96875v 0101100: 0.97500v 0101101: 0.98125v 010 1110: 0.98750v 0101111: 0.99375v 0110000: 1.00000v 0110001: 1.00625v 0110010: 1.01250v 0110011: 1.01875v 0110100: 1.02500v 0110101: 1.03125v 0110110: 1.03750v 0110111: 1.04375v 0111000: 1.05000v 0111001: 1.05625v 0111010: 1.06250v 0111011: 1.06875v 0111100 : 1.07500v 0111101: 1.08125v 0111110: 1.08750v 0111111: 1.09375v 1000000: 1.10000v 1000001: 1.10625v 1000010: 1.11250v 1000011: 1.11875v 1000100: 1.12500v 1000101: 1.13125v 1000110: 1.13750v 1000111: 1.14375v 1001000: 1.15000v 1001001: 1.15625v 1001010: 1. 16250v 1001011: 1.16875v 1001100: 1.17500v 1001101: 1.18125v 1001110: 1.18750v 1001111: 1.19375v 1010000: 1.20000v 1010001: 1.20625v 1010010: 1.21250v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 38 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1010011: 1.21875v 1010100: 1.22500v 1010101: 1.23125v 1010110: 1.23750v 1010111: 1.24375v 1011000: 1.2500 0v 1011001: 1.25625v 1011010: 1.26250v 1011011: 1.26875v 1011100: 1.27500v 1011101: 1.28125v 1011110: 1.28750v 1011111: 1.29375v 1100000: 1.30000v 1100001: 1.30625v 1100010: 1.31250v 1100011: 1.31875v 1100100: 1.32500v 1100101: 1.33125v 1100110: 1.33750v 1 100111: 1.34375v 1101000: 1.35000v 1101001: 1.35625v 1101010: 1.36250v 1101011: 1.36875v 1101100: 1.37500v 1101101: 1.38125v 1101110: 1.38750v 1101111: 1.39375v 1110000: 1.40000v 1110001: 1.40625v 1110010: 1.41250v 1110011: 1.41875v 1110100: 1.42500v 11101 01: 1.43125v 1110110: 1.43750v 1110111: 1.44375v 1111000: 1.45000v 1111001: 1.45625v 1111010: 1.46250v 1111011: 1.46875v 1111100: 1.47500v 1111101: 1.48125v 1111110: 1.48750v 1111111: 1.49375v 82 vmem_con13 vmem control register 13 50 bit 7 6 5 4 3 2 1 0 nam e vmem_vosel_on type rw reset 1 0 1 0 0 0 0 bit(s) mnemonic nam e description 6:0 vmem_v osel_on vmem_vosel_ on selects vout in norm al m ode 0000000: 0.70000v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 39 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 0000001: 0.70625v 0000010: 0.71250v 0000011: 0.71875v 0000100: 0.72500v 0000101: 0.73125v 0000110: 0.73750v 0000111: 0.74375v 0001000: 0.75000v 0001001: 0.75625v 0001010: 0.76250v 0001011: 0.76875v 0001100: 0.77500v 0001101: 0.78125v 0001110: 0.78750v 0001111: 0.79375v 0010000: 0.80000v 0010001: 0.80625v 0010010: 0.81250v 0010011: 0.81875v 0010100: 0.82500v 0010101: 0.83125v 0010110: 0.83750v 0010111: 0.84 375v 0011000: 0.85000v 0011001: 0.85625v 0011010: 0.86250v 0011011: 0.86875v 0011100: 0.87500v 0011101: 0.88125v 0011110: 0.88750v 0011111: 0.89375v 0100000: 0.90000v 0100001: 0.90625v 0100010: 0.91250v 0100011: 0.91875v 0100100: 0.92500v 0100101: 0.93125v 0100110: 0.93750v 0100111: 0.94375v 0101000: 0.95000v 0101001: 0.95625v 0101010: 0.96250v 0101011: 0.96875v 0101100: 0.97500v 0101101: 0.98125v 0101110: 0.98750v 0101111: 0.99375v 0110000: 1.00000v 0110001: 1.00625v 0110010: 1.01250v 0110011: 1.01875v 011 0100: 1.02500v 0110101: 1.03125v 0110110: 1.03750v 0110111: 1.04375v 0111000: 1.05000v 0111001: 1.05625v 0111010: 1.06250v 0111011: 1.06875v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 40 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 0111100: 1.07500v 0111101: 1.08125v 0111110: 1.08750v 0111111: 1.09375v 1000000: 1.10000v 1000001: 1.10625v 1000010 : 1.11250v 1000011: 1.11875v 1000100: 1.12500v 1000101: 1.13125v 1000110: 1.13750v 1000111: 1.14375v 1001000: 1.15000v 1001001: 1.15625v 1001010: 1.16250v 1001011: 1.16875v 1001100: 1.17500v 1001101: 1.18125v 1001110: 1.18750v 1001111: 1.19375v 1010000: 1. 20000v 1010001: 1.20625v 1010010: 1.21250v 1010011: 1.21875v 1010100: 1.22500v 1010101: 1.23125v 1010110: 1.23750v 1010111: 1.24375v 1011000: 1.25000v 1011001: 1.25625v 1011010: 1.26250v 1011011: 1.26875v 1011100: 1.27500v 1011101: 1.28125v 1011110: 1.2875 0v 1011111: 1.29375v 1100000: 1.30000v 1100001: 1.30625v 1100010: 1.31250v 1100011: 1.31875v 1100100: 1.32500v 1100101: 1.33125v 1100110: 1.33750v 1100111: 1.34375v 1101000: 1.35000v 1101001: 1.35625v 1101010: 1.36250v 1101011: 1.36875v 1101100: 1.37500v 1 101101: 1.38125v 1101110: 1.38750v 1101111: 1.39375v 1110000: 1.40000v 1110001: 1.40625v 1110010: 1.41250v 1110011: 1.41875v 1110100: 1.42500v 1110101: 1.43125v 1110110: 1.43750v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 41 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1110111: 1.44375v 1111000: 1.45000v 1111001: 1.45625v 1111010: 1.46250v 11110 11: 1.46875v 1111100: 1.47500v 1111101: 1.48125v 1111110: 1.48750v 1111111: 1.49375v 83 vmem_con14 vmem control register 14 50 bit 7 6 5 4 3 2 1 0 nam e vmem_vosel_sleep type rw reset 1 0 1 0 0 0 0 bit(s) mnemonic nam e description 6:0 vmem_v osel_sl eep vmem_vosel_ sleep selects vout in sleep m ode 0000000: 0.70000v 0000001: 0.70625v 0000010: 0.71250v 0000011: 0.71875v 0000100: 0.72500v 0000101: 0.73125v 0000110: 0.73750v 0000111: 0.74375v 0001000: 0.75000v 0001001: 0.75625v 0001010: 0.76250v 0001011: 0.76875v 0001100: 0.77500v 0001101: 0.78125v 0001110: 0.78750v 0001 111: 0.79375v 0010000: 0.80000v 0010001: 0.80625v 0010010: 0.81250v 0010011: 0.81875v 0010100: 0.82500v 0010101: 0.83125v 0010110: 0.83750v 0010111: 0.84375v 0011000: 0.85000v 0011001: 0.85625v 0011010: 0.86250v 0011011: 0.86875v 0011100: 0.87500v 0011101: 0.88125v 0011110: 0.88750v 0011111: 0.89375v 0100000: 0.90000v 0100001: 0.90625v 0100010: 0.91250v 0100011: 0.91875v 0100100: 0.92500v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 42 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 0100101: 0.93125v 0100110: 0.93750v 0100111: 0.94375v 0101000: 0.95000v 0101001: 0.95625v 0101010: 0.96250v 0101011: 0.9 6875v 0101100: 0.97500v 0101101: 0.98125v 0101110: 0.98750v 0101111: 0.99375v 0110000: 1.00000v 0110001: 1.00625v 0110010: 1.01250v 0110011: 1.01875v 0110100: 1.02500v 0110101: 1.03125v 0110110: 1.03750v 0110111: 1.04375v 0111000: 1.05000v 0111001: 1.05625 v 0111010: 1.06250v 0111011: 1.06875v 0111100: 1.07500v 0111101: 1.08125v 0111110: 1.08750v 0111111: 1.09375v 1000000: 1.10000v 1000001: 1.10625v 1000010: 1.11250v 1000011: 1.11875v 1000100: 1.12500v 1000101: 1.13125v 1000110: 1.13750v 1000111: 1.14375v 10 01000: 1.15000v 1001001: 1.15625v 1001010: 1.16250v 1001011: 1.16875v 1001100: 1.17500v 1001101: 1.18125v 1001110: 1.18750v 1001111: 1.19375v 1010000: 1.20000v 1010001: 1.20625v 1010010: 1.21250v 1010011: 1.21875v 1010100: 1.22500v 1010101: 1.23125v 101011 0: 1.23750v 1010111: 1.24375v 1011000: 1.25000v 1011001: 1.25625v 1011010: 1.26250v 1011011: 1.26875v 1011100: 1.27500v 1011101: 1.28125v 1011110: 1.28750v 1011111: 1.29375v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 43 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1100000: 1.30000v 1100001: 1.30625v 1100010: 1.31250v 1100011: 1.31875v 1100100: 1 .32500v 1100101: 1.33125v 1100110: 1.33750v 1100111: 1.34375v 1101000: 1.35000v 1101001: 1.35625v 1101010: 1.36250v 1101011: 1.36875v 1101100: 1.37500v 1101101: 1.38125v 1101110: 1.38750v 1101111: 1.39375v 1110000: 1.40000v 1110001: 1.40625v 1110010: 1.412 50v 1110011: 1.41875v 1110100: 1.42500v 1110101: 1.43125v 1110110: 1.43750v 1110111: 1.44375v 1111000: 1.45000v 1111001: 1.45625v 1111010: 1.46250v 1111011: 1.46875v 1111100: 1.47500v 1111101: 1.48125v 1111110: 1.48750v 1111111: 1.49375v 84 vmem_con15 vmem control register 15 50 bit 7 6 5 4 3 2 1 0 nam e ni_vmem_vosel type ro reset 1 0 1 0 0 0 0 bit(s) mnemonic nam e description 6:0 ni_vmem _vosel ni_vmem_v ose l selects vout 0000000: 0.70000v 0000001: 0.70625v 0000010: 0.71250v 0000011: 0.71875v 0000100: 0.72500v 0000101: 0.73125v 0000110: 0.73750v 0000111: 0.74375v 0001000: 0.75000v 0001001: 0.75625v 0001010: 0.76250v 0001011: 0.76875v 0001100: 0.77500v 0001101: 0.78125v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 44 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 0001110: 0.78750v 0001111: 0.79375v 0010000: 0.80000v 0010001: 0.80625v 0010010: 0.81250v 0010011: 0.81875v 0010100: 0.82500v 0010101: 0.83125v 0010 110: 0.83750v 0010111: 0.84375v 0011000: 0.85000v 0011001: 0.85625v 0011010: 0.86250v 0011011: 0.86875v 0011100: 0.87500v 0011101: 0.88125v 0011110: 0.88750v 0011111: 0.89375v 0100000: 0.90000v 0100001: 0.90625v 0100010: 0.91250v 0100011: 0.91875v 0100100: 0.92500v 0100101: 0.93125v 0100110: 0.93750v 0100111: 0.94375v 0101000: 0.95000v 0101001: 0.95625v 0101010: 0.96250v 0101011: 0.96875v 0101100: 0.97500v 0101101: 0.98125v 0101110: 0.98750v 0101111: 0.99375v 0110000: 1.00000v 0110001: 1.00625v 0110010: 1.0 1250v 0110011: 1.01875v 0110100: 1.02500v 0110101: 1.03125v 0110110: 1.03750v 0110111: 1.04375v 0111000: 1.05000v 0111001: 1.05625v 0111010: 1.06250v 0111011: 1.06875v 0111100: 1.07500v 0111101: 1.08125v 0111110: 1.08750v 0111111: 1.09375v 1000000: 1.10000 v 1000001: 1.10625v 1000010: 1.11250v 1000011: 1.11875v 1000100: 1.12500v 1000101: 1.13125v 1000110: 1.13750v 1000111: 1.14375v 1001000: 1.15000v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 45 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. bit(s) mnemonic nam e description 1001001: 1.15625v 1001010: 1.16250v 1001011: 1.16875v 1001100: 1.17500v 1001101: 1.18125v 1001110: 1.18750v 10 01111: 1.19375v 1010000: 1.20000v 1010001: 1.20625v 1010010: 1.21250v 1010011: 1.21875v 1010100: 1.22500v 1010101: 1.23125v 1010110: 1.23750v 1010111: 1.24375v 1011000: 1.25000v 1011001: 1.25625v 1011010: 1.26250v 1011011: 1.26875v 1011100: 1.27500v 101110 1: 1.28125v 1011110: 1.28750v 1011111: 1.29375v 1100000: 1.30000v 1100001: 1.30625v 1100010: 1.31250v 1100011: 1.31875v 1100100: 1.32500v 1100101: 1.33125v 1100110: 1.33750v 1100111: 1.34375v 1101000: 1.35000v 1101001: 1.35625v 1101010: 1.36250v 1101011: 1 .36875v 1101100: 1.37500v 1101101: 1.38125v 1101110: 1.38750v 1101111: 1.39375v 1110000: 1.40000v 1110001: 1.40625v 1110010: 1.41250v 1110011: 1.41875v 1110100: 1.42500v 1110101: 1.43125v 1110110: 1.43750v 1110111: 1.44375v 1111000: 1.45000v 1111001: 1.456 25v 1111010: 1.46250v 1111011: 1.46875v 1111100: 1.47500v 1111101: 1.48125v 1111110: 1.48750v 1111111: 1.49375v 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 46 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. 9f vrf18_con21 vrf18 control register 21 08 bit 7 6 5 4 3 2 1 0 nam e qi_vrf18 _en qi_vrf18 _stb vrf18_e n rg_vrf1 8_modes et type ro ro rw rw reset 0 0 0 0 bit(s) mnemonic nam e description 6 qi_v rf18 _en qi_v rf18_en en abling signal 5 qi_v rf18 _st b qi_v rf18_stb soft start 1 vrf18_e n vrf18_en 0: disable 1: enable 0 rg_v rf1 8_modes et rg_v rf18_mo deset 0: auto mode 1: force pwm mode a0 vrf18_con22 vrf18 control register 22 00 bit 7 6 5 4 3 2 1 0 nam e rg_vrf1 8_modes et_spm type rw reset 0 bit(s) mnemonic nam e description 0 rg_v rf1 8_modes et _spm rg_v rf18_mo deset_spm 0: auto mode 1: force pwm mode fd cid1 chip id status 1 30 bit 7 6 5 4 3 2 1 0 nam e cid1 type ro reset 0 0 1 1 0 0 0 0 bit(s) mnemonic nam e description 7:0 cid1 cid1 cid0 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 47 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. 4 application notes 4.1 connection with main c hip & main pmic the following schematic illustrates the connection with main chip and main pmic . ? sleep_b C sleep mode controlled by srclken ? int C interrupt flag report to main chip ? buck_en C turn s on /off vcore & vmem by main pmic; 6322/ 6323 figure 4 - 1 . MT6333 connection with main chip and main pmic 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 48 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. 5 mt63 3 3 packaging 5.1 package dimensions 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < o r j l q l g ] k d r o l i h q j # y d q ] r w h f f r p w l p h l s g r f w l w o h 0 7 b 3 0 , & b ' d w d b 6 k h h w b 9 s g i f r p s d q \ 9 d q ] r b : & ; mt 6333 pmic datasheet confidential a mediatek confidential ? 2013 mediatek inc. page 49 of 49 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. appendix n/a 0 ( ' , $ 7 ( . & 2 1 ) , ' ( 1 7 , $ / ) 2 5 ] k d r o l i h q j # y d q ] r w h f f r p 8 6 ( 2 1 / < |
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